Breker CEO explains his graph-based "intelligent testbench" tool in DeepChip (12/18/08)
ESNUG 478 Item 4
"Breker is in the 'intelligent testbench' arena. We approach verification
planning/automated test case generation through what we call graph-based
scenario planning (that we deliver in our Trek product.)"
http://www.deepchip.com/items/
0478-04.html
Opinion: EDA is not well—where is it heading? in EETimes (11/6/08)
by Paul McLellan
"With hiring freezes and large layoffs, the big EDA companies are going to be underpowered on innovation. Further, with official and not so
official policies against acquisition of startups, venture capitalists have largely exited the industry, looking for more attractive rates
of return elsewhere, and so the flow of small companies is running dry."
http://eetimes.com/news/design/show
Article.jhtml;jsessionid=D1OEPBVLK
RVTSQSNDLPSKHSCJUNN2JVN?article
ID=212000982
Quality Time? in System-Level Design Community, 10/8/2008
by Ed Sperling
"We need to build coverage around the outcomes you've got to test for and the constructs that will give you these applets. We also see that people
need to be able to verify their IP cores faster. The third thing is vertical re-use. We want to be able to test pieces of firmware to work with our
systems."
http://chipdesignmag.com/sld/blog/
2008/10/08/quality-time/
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